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4d ago

Sr Analog Design Engg.

onsemi

Bengaluru, Karnataka, IndiaOn-siteseniorNot disclosed
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About the role

OnSemi is seeking a Sr Analog design Engineer, NEW PRODUCT DEVELOPMENT, Power Management, to join our growing team in Bengaluru, India. This group is responsible for development of Power management products including DC-DC PMIC/POL, Multiphase controllers, Dr. MOS, AC-DC converters, LED drivers, SiC drivers, Switches and efuses for consumer, industrial and automotive applications. In this role, you will focus on the following

  • Design and develop an analog IP block from definition to IP delivery
  • Design and simulation at the block/IP level during execution phase, present the block results to review team in timely manner.
  • Work with and provide guidance to physical designers and monitors the progress of IP block layout
  • Work with validation, product engineering and test engineering teams to enable them to measure Si performance
  • Own technical outcomes of design, verification, implementation, and execution of power management IPs with complexities that can span from simple regulators to complex mixed-signal designs and control loops
  • Able to plan and execute the work in timely manner aligning with full chip schedule.

#L1-LK1

onsemi is seeking a Sr Analog design Engineer, NEW PRODUCT DEVELOPMENT, Power Management, to join our growing team in Bengaluru, India. This group is responsible for development of Power management products including DC-DC PMIC/POL, Multiphase controllers, Dr. MOS, AC-DC converters, LED drivers, SiC drivers, Switches and efuses for consumer, industrial and automotive applications. In this role, you will focus on the following

  • Design and develop an analog IP block from definition to IP delivery
  • Design and simulation at the block/IP level during execution phase, present the block results to review team in timely manner.
  • Work with and provide guidance to physical designers and monitors the progress of IP block layout
  • Work with validation, product engineering and test engineering teams to enable them to measure Si performance
  • Own technical outcomes of design, verification, implementation, and execution of power management IPs with complexities that can span from simple regulators to complex mixed-signal designs and control loops
  • Able to plan and execute the work in timely manner aligning with full chip schedule. #L1-LK1
  • Solid track record of delivering block/IP level design
  • Sound knowledge in CMOS analog design, CMOS fundamentals and related simulation tools
  • Good communication skills to make detailed technical presentations
  • Good understanding of various Power Converters such as Buck, Boost, LDOs, gate drivers, comparators, linear regulators gm-stage and relevant Analog building blocks
  • Experience in power converters like DC/DC, AC/DC, gate drivers, PMICs etc is plus
  • Strong Analog IC design skills, debug of complex silicon problems using simulations and/or bench testing
  • Understanding of large power transistor (LDMOS) Design, Layout, and Robustness
  • Experience in system tools such as Simplis or MATLAB for architectural simulations, Cadence Spectre for schematic capture, simulation, layout, and tape-out
  • Strong verbal and written communication skills
  • Ability to quickly ramp on new systems and processes
  • Demonstrated strong interpersonal, analytical and problem-solving skills
  • Ability to work in teams

#L1-LK1

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